Nodes, EUV tools, yield, and the push toward angstrom‑class manufacturing.
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Huawei is reportedly testing several phones for a possible new sub-brand, with at least one prototype said to use an integrated active-cooling fan. The hardware could help sustain performance during extended gaming sessions by moving heat away from the chipset,…
TradingView Samsung to use TSMC technology for Nvidia's next-generation memory chips, Seoul newspaper reports
Nvidia is reportedly steering Samsung, SK Hynix, and Micron toward TSMC's 3nm process for its new NVHBM memory standard Nvidia wants its AI memory built a very specific way. It also wants one company doing the most important part of the…
Where China Innovation Meets the World Want to read in a language you're more familiar with? Shanghai-based Langdao Silex displayed an LPP extreme ultraviolet light source prototype at CIIF 2026. Its low-power system delivers over 15W, far below the hundreds of watts…
TSMC’s latest lithography is typically adopted by Apple in its A-series chipsets to gain a competitive edge in the industry, but on this occasion, the company may be moving to a new manufacturing process out of desperation. As leading-edge chip…
Surpassing the 100 million processor shipment mark, Huawei is creating a new semiconductor breakthrough with its 3D LogicFolding architecture, which significantly increases transistor density for its chips. Huawei has officially surpassed the milestone of shipping 100 million Kirin processors since 2023. This milestone confirms…
That is the honest shape of this release: a paper, a repo, a checkpoint, and an evaluation table that claims to beat Claude Opus 5. Everything below is either read directly out of the repository or labelled as the vendor's own…
The development is particularly relevant to chipmakers and foundries moving toward High-NA EUV lithography, where increasingly complex patterns demand significantly more computing power. It could also help European semiconductor manufacturers improve production efficiency and accelerate the introduction of advanced AI…
Semiconductor watchers are tracking signs that ASML is developing a die-to-wafer hybrid bonding tool, a move that could deepen its ties with chipmakers and challenge packaging specialist Besi. The technology promises tighter alignment, cleaner processing and a more flexible route…
Next generation of semiconductor manufacturing will be enabled by the precise interaction of many highly complex process steps. ZEISS NLX: Makes internal structures in modern chip packages visible without destroying them. Chip manufacturers can use it, as an example, to…